Seoul (South Korea) – The incessant technological evolution that is affecting non-volatile memories, and especially flash ones, has as its new milestone the development of NAND flash chips with 40 nanometer circuits and storage density equal to 32 Gigabit (4 Gigabytes).
The new milestone was announced by Samsung, which made use of one for the first time new architecture , called Charge Trap Flash (CTF), able to improve both the performance and the reliability of flash memories. The giant claims that CTF technology also simplifies chip manufacturing, reducing costs and maximizing yield, and paves the way for 30 and 20nm manufacturing processes (which will push density to 256Gbit).
Samsung plans to use 32Gbit NAND flash chips for the creation of memory cards with capacities up to 64GB (16 chips), enough to store up to 40 DVD movies and over 16,000 MP3 songs.
The constant growth in the density of flash chips is important not only for the evolution of mobile devices, but above all for the affirmation on the solid state disk market: one of the very first models was launched by Samsung last May and is already inside some Ultra-Mobile PCs and notebooks.
The Seoul chipmaker has not yet revealed the marketing date of the new memories, but this may not happen before 12-18 months. In fact, it must be considered that the volume production of 70 nm (8 Gbit) NAND flash began last July, and before moving on to the production of 40 nm chips there are two intermediate steps. The 60nm process technology is currently being used by Samsung only for the production of a particular type of flash chip, called OneNAND, which combines some of the aspects of the NAND memory architecture with those of NOR.
